Lehrinhalte
Types of instruction sets, memory organization and its impact on the runtime, pipelining, instruction level parallelism, superscalar processors, VLIW processors, floating point numbers and operations, memory subsystem, cache types, virtual address spaces, benchmarking and performance prediction, system architecture and bus systems, peripheral devices
Literatur
Hennessy/Patterson: Computer architecture - a quantitative approac
Voraussetzungen
Basic knowledge of digital design as it can be obtained by the lecture "Logic Design".
Additional Information
[url=http://www.rs.e-technik.tu-darmstadt.de/Lehre.5.0.html]www.rs.e-technik.tu-darmstadt.de/Lehre.5.0.html[/url]
Types of instruction sets, memory organization and its impact on the runtime, pipelining, instruction level parallelism, superscalar processors, VLIW processors, floating point numbers and operations, memory subsystem, cache types, virtual address spaces, benchmarking and performance prediction, system architecture and bus systems, peripheral devices
Literatur
Hennessy/Patterson: Computer architecture - a quantitative approac
Voraussetzungen
Basic knowledge of digital design as it can be obtained by the lecture "Logic Design".
Additional Information
[url=http://www.rs.e-technik.tu-darmstadt.de/Lehre.5.0.html]www.rs.e-technik.tu-darmstadt.de/Lehre.5.0.html[/url]
- Lehrende: Christian Hochberger
- Lehrende: Andreas Koch
Semester: Verão 2019