Lehrinhalte
Realisation of a VHDL- or Verilog-based VLSI System Design Project in a Team with industrial constraints

Literatur
Lecture slides „Computer Aided Design for SoCs“

Voraussetzungen
Mandatory Prerequisite: Lecture Computer Aided Design for SoCs, 
At least one high-level Programming Language, Basic Know-How Linux/Unix, Computer Architectures

Semester: ST 2020